This amplifies the difference between two inputs Vp and Vn the low impedance of this configuration is a drawback, but can be used in analog computing. Optimum VCC VDD can be +12/-12. AC signals common to Vp and Vn are canceled by this configuration.
Use a capacitor like 10nF plastic from pin 2 to 3 or across R2 to make circuit stable. For AC applications use LF351 TLO71 as they have good slew rate and also are FET inputs. For AC applications use a capacitor (1uF) in series with Ri to block DC Components. The Inputs have asymmetrical input impedance this affects CMRR, also use 1% tolerance MFR resistors for Rf and Ri.
Vout = (Vp – Vn) * (Rf/Ri)
Instrumentation and Measurement Circuits
This shows how to OR gate two 555, when one 555 cycles at a low frequency a valve turns on an off, the second 555 stretches the ON duration of the pulse with a diode OR gate.
Digital Timers Counters and Clocks
The OR output uses sample and hold to get the stable analog data from a sensor after the actuator has gone OFF, this ensures correct reading.
555 is a fundamental Mixed Signal Circuit as it can be made into a VCO using Pin-5. If you see old exar databooks, you can see 555 and PLL and Tone decoders all applications compiled in one base. I feel the Venerable Signetics 555 “Architecture” and Intersil ICL8038 ‘CMOS’ were inspiration behind early communication chip designs, Moving from Bakelite Telephones to Compact Push Button Electronic Phones and more.